DEC 10 computer systems


The PDP-10 mainframe computer family from Digital Equipment Corporation (DEC), subsequently marketed as the DECsystem-10, was produced starting in 1966 and was retired in 1983. Models from the 1970s and beyond were marketed under the DECsystem-10 brand, particularly when the TOPS-10 operating system gained popularity.

DEC 10 computers are a part of the 4th generation of computers. The PDP-10 shares the same 36-bit word length and somewhat longer instruction set as DEC’s older PDP-6, making its architecture almost similar but with advanced hardware. The byte instructions, which operate on bit fields of any size from one to thirty-six bits inclusive, in accordance with the conventional definition of a byte as a continuous sequence of a given number of bits, are among the instruction set’s most peculiar features.

DEC 10’s Evolution

The KA10, which was first released in 1968, is the original PDP-10 processor. It makes use of discrete transistors packed using DEC’s Flip-Chip technology, and wires are wrapped around backplanes during manufacture in a semi-automated manner. Its add time is 2.1 s and its cycle time is 1 s. The KI10, which employs transistor-transistor logic, took the place of the KA10 in 1973. The speedier KL10 (after faster variations), which uses emitter-coupled logic, is microprogrammed, and includes cache memory, joined this in 1975. When matrix row reduction was used, the KL10 performed at a rate of roughly 1 megaflops when utilising 36-bit floating point integers. Despite having less memory than the more recent VAX-11/750, it was a little speedier.

In 1978, a smaller, more affordable iteration called the KS10 was released. It used TTL and Am2901 bit-slice components and the PDP-11 Unibus to link peripherals. As DEC’s introduction into the distributed processing industry and the lowest cost mainframe computer system, the KS10 was marketed as the DECsystem-2020, a member of the DECsystem-20 family.


For system startup and monitoring, the KL class computers contain a PDP-11/40 front-end CPU. The main processor, which is normally booted from the same RP06 disc drive as the PDP-11, may be started by giving commands to the PDP-11 once it has been started from a dual-ported RP06 disc drive. Once the primary processor is active, the PDP-11 conducts watchdog tasks.

A DN61 or DN-64 front-end processor employing a PDP-11/40 or PDP-11/34a was used to communicate with IBM mainframes, including Remote Job Entry.


The 20xx series KL machines’ I/O architecture is based on the Massbus, a DEC bus architecture. While many people credited DEC’s choice to create the PDP-11 Unibus with an open architecture for the PDP-11’s success, DEC reverted to its previous mindset with the KL, creating Massbus, which was both unique and proprietary. Due to the lack of aftermarket peripheral manufacturers for the Massbus, DEC decided to price their own Massbus products, particularly the RP06 disc drive, much more than equivalent IBM-compatible products. One company, CompuServe, created its own alternate disc controller that could run on the Massbus while connecting to disc subsystems in the IBM 3330 architecture.

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